The process of fabricating semiconductor integrated circuits generally includes the formation of such components as, gate oxides, high k dielectrics, low k dielectrics, barrier layers, etch stop layers and gate spacers. Such components often include silicon or silicon oxide in their compositions. For example, conventional gate dielectric materials may be formed from silicon dioxide, silicon oxy-nitride, silicon nitride or metal silicates.
Semiconductor devices such as field effect transistors (FET) and metal oxide semiconductor capacitors (MOS-caps), which are common in the electronics industry, include many of the components identified above. Such devices may be formed with dimensions that enable thousands or even millions of devices to be formed on a single-crystal substrate and interconnected to perform useful functions in an integrated circuit such as a microprocessor.
The general structure and operation of a field effect transistor is as follows. With reference to FIG. 1, a simplified field effect transistor is shown in cross-section. In a field effect transistor a portion of the substrate (or epi-layer) 100 near the surface is designated as the channel 120 during processing. Channel 120 is electrically connected to source 140 and drain 160, such that when a voltage difference exists between source 140 and drain 160, current will tend to flow through channel 120. The semiconducting characteristics of channel 120 are altered such that its resistivity may be controlled by the voltage applied to gate 200, a conductive layer overlying channel 120. Thus by changing the voltage on gate 200, more or less current can be made to flow through channel 120. Gate 200 and channel 120 are separated by gate dielectric 180; the gate dielectric is insulating, such that between gate 200 and channel 120 the current flow during operation is small compared to the source to drain current (although “tunneling” current is observed with thin dielectrics.) However, the gate dielectric allows the gate voltage to induce an electric field in channel 120, giving rise to the name “field effect transistor.” The general structure of a MOS-cap can be visualized as layers 200, 180 and 120 of FIG. 1 without the source and drain. The MOS-cap functions as a capacitor.
SiO2 represents the highest quality gate dielectric material 180 so far developed in silicon technology with low defects and low surface state density. One important advantage of SiO2 is that it may be grown from the silicon substrate at elevated temperatures in an oxidizing environment. It is well known in the art, that thermally grown oxides tend to have fewer defects, (i.e. pinholes), than deposited materials. Thus, SiO2 has persisted as the dielectric material in most silicon device structures.
Generally, integrated circuit performance and density may be enhanced by decreasing the size of the individual semiconductor devices on a chip. Unfortunately, field effect semiconductor devices produce an output signal that is proportional to the length of the channel, such that scaling reduces their output. This effect has generally been compensated for by decreasing the thickness of gate dielectric 180, thus bringing the gate in closer proximity to the channel and enhancing the field effect.
As devices have scaled to smaller and smaller dimensions, the gate dielectric thickness has continued to shrink. Although further scaling of devices is still possible, scaling of the gate dielectric thickness has almost reached its practical limit with the conventional gate dielectric materials: silicon dioxide, silicon oxy-nitride and silicon nitride. Further scaling of silicon dioxide gate dielectric thickness will involve problems such as: extremely thin layers allowing for large leakage currents due to direct tunneling through the oxide. Because such layers are formed literally from a few atomic layers, exact process control is required to repeatably produce such layers. Uniformity of coverage is also critical because device parameters may change dramatically based on the presence or absence of even a single monolayer of dielectric material. Finally, such thin layers form poor diffusion barriers to impurities and dopants.
Consequently, there is a need in the art for alternative dielectric materials, which can be formed in a thicker layer than silicon dioxide and yet still produce the same field effect performance. This performance is often expressed as “equivalent oxide thickness” (EOT). Although the alternative material layer may be thick, it has the equivalent effect of a much thinner layer of silicon dioxide (commonly called simply “oxide”). In order to have a physically thick layer with a low EOT, the dielectric constant of the insulating material must be increased. Many, if not most, of the attractive alternatives for achieving low equivalent oxide thicknesses are metal oxides, such as tantalum pentoxide, titanium dioxide, barium strontium titanate and other suitable thin films.
However, the formation of such metal oxides as gate dielectrics has been found to be problematic. At typical metal oxide deposition temperatures, the oxygen co-reactant or oxygen-containing precursor tends to oxidize the silicon substrate, producing a lower dielectric constant oxide layer at the interface between the substrate and the higher dielectric constant, gate dielectric material. It could be that the transition metal oxide acts as a catalytic source of activated oxygen, that the precursor molecules increase the oxygen activity or that oxygen from the precursor is incorporated in the growing oxide film. Whatever the cause, the presence of this interfacial oxide layer increases the effective oxide thickness, reducing the effectiveness of the alternative gate dielectric material. The existence of the interfacial oxide layer places a severe constraint on the performance of an alternative dielectric field effect device and therefore, is unacceptable.
The use of metal oxide and metal oxy-nitride thin films comprising Zr, Hf, Y, La, Lanthanide series elements, Ta, Ti and/or Al and silicates of these metal oxides and metal oxy-nitrides are regarded as potential material replacements of the SiO2 gate oxides, (i.e., U.S. Pat. Nos. 6,159,855 and 6,013,553). However, to ensure a high integrity interface between the silicon and the gate dielectric film these films must be deposited at relatively low temperatures.
The source reagents and methodology employed to form such gate dielectric thin films are extremely critical for the provision of a gate structure having satisfactory electrical performance characteristics in the product device. Specifically, the source reagents and methodology must permit the gate dielectric thin film to form on a clean silicon surface, without the occurrence of side reactions producing predominantly silicon dioxide (SiO2), locally doped SiO2 and/or other impurities, that lower the dielectric constant and compromise the performance of the product microelectronic device. Accordingly, the absence of impurities is highly desirable.
Chemical vapor deposition (CVD) is the thin film deposition method of choice for high-density, large-scale fabrication of microelectronic device structures, and the semiconductor manufacturing industry has extensive expertise in its use. Metalorganic CVD (MOCVD) and more particularly atomic layer CVD (ALCVD) are particularly advantageous processes because they allow for lower deposition temperatures and stricter control of the stoichiometry and thickness of the formed layer.
In the formation of gate dielectrics and other semiconductor manufacturing applications it is essential to control the composition of the deposited thin film. The molar ratio(s) of the different elements in the thin film typically corresponds very closely to a predetermined value. Therefore, it is very important to select a precursor delivery system that allows for strict control of the precursors delivered into the CVD chamber. Precursor delivery systems are well known in the art of CVD, (i.e., U.S. Pat. No. 5,820,678, entitled “Solid Source MOCVD System” describes the bubbler delivery approach and U.S. Pat. No. 5,204,314, entitled “Method for Delivering an Involatile Reagent in Vapor Form to a CVD Reactor,” and U.S. Pat. No. 5,536,323, entitled “Apparatus for Flash Vaporization Delivery of Reagents,” describe the liquid delivery, flash vaporization approach).
Chemical vapor deposition (CVD) of silicon-containing films provides uniform coverage. Liquid CVD precursors enable direct delivery or liquid injection of the precursors into a CVD vaporizer unit. The accurate and precise delivery rate can be obtained through volumetric metering to achieve reproducible CVD metallization during VLSI device manufacturing.
Impurities that are known to lower the dielectric constant and/or increase leakage include among others, carbon and halides. Carbon and/or halide incorporation into the dielectric thin film would degrade leakage, dielectric constant, and overall electrical performance of the thin film. In contrast, nitrogen incorporation may exhibit some beneficial properties on the dielectric thin film.
Excess halide may adversely affect a gate dieletric thin film in either of two ways. Halide incorporation into a gate dielectric thin film, may directly affect the electronic nature of the film, thereby reducing device lifetime. Secondly, halide, such as chloride, leads to formation of hydrogen chloride during the decomposition of the precursor, which potentially affects the CVD chamber making the treatment of the effluent from the chamber more challenging.
Zr, Hf, Y, La, Lanthanide series elements, Ta, Ti, Al and/or silicon source reagents, specifically Zr and Hf-containing silicates such as ZrxSi1-xO2, and HfxSi1-xO2 are of great interest for use as next generation gate dielectrics. These materials possess dielectric constant (k) values in the range of 10 to 20, depending on x, and allow the use of a physical thickness to prevent leakage by electron tunneling. Given the feature sizes of the VLSI devices, CVD is becoming a unique technique for depositing these materials.
In such applications, the choice of the zirconium or hafnium CVD source reagents and a compatible silicon source reagent is of critical importance for the successful deposition of high quality Zr or Hf silicate gate dielectric. Low temperature CVD silicon precursors are required to minimize the formation of interfacial silicon dioxide. Ideally, the precursors are compatible in solution and in vapor phase and decompose below 600° C. on substrate surfaces, forming Hf or Zr silicates in high purity and high density with no interfacial layer.
The source reagents must be thermally stable to avoid premature decomposition of such source reagents before they reach the CVD reaction chamber during the CVD process. Premature decomposition of source reagents not only results in undesirable accumulation of side products that will clog fluid flow conduits of the CVD apparatus, but also causes undesirable variations in composition of the deposited gate dielectric thin film. Further, particle formation can result in deleterious yields in device fabrication.
Further, Zr, Hf, Y, La, Lanthanide series elements, Ta, Ti, Al and/or silicon source reagents have to be chemically compatible with other source reagents used in the CVD process. “Chemically compatible” means that the source reagents will not undergo, undesirable side reactions with other co-deposited source reagents, and/or deleterious ligand exchange reactions that may alter the precursor properties, such as transport behavior, incorporation rates and film stoichiometries. Finally, Zr, Hf, Y, La, Lanthanide series elements, Ta, Ti, Al and/or silicon source reagents selected for MOCVD of dielectric thin films must be able to maintain their chemical identity over time when dissolved or suspended in organic solvents or used in conventional bubblers. Any change in chemical identity of source reagents in the solvent medium is deleterious since it impairs the ability of the CVD process to achieve repeatable delivery and film growth.
There is a continuing need in the art to provide improved Zr, Hf, Y, La, Lanthanide series elements, Ta, Ti, Al and/or silicon source reagents suitable for high efficiency CVD processes, for fabricating corresponding high quality gate dielectric, thin films.
Silicon amide source reagents are of great interest for use as low temperature CVD precursors in many applications, e.g., CVD of silicon nitride and early transition metal silicates. However, many commercially available silicon amides have unacceptably high levels of chloride.
Currently available synthetic routes result in poor yields and/or impure material. For example, Gerard Kannengiesser and Francois Damm, (Bull. Soc. Chim. Fr. (1967), (7), 2492–5) disclose the method outlined by equation (1) below and report a product yield of only about 20%.SiCl4+4R2NMgBr→Si(NR2)4+4MgBrCl  (1)
R. Gordon, D. Hoffman and U. Riaz report (Chem. Mater. 1990, 2, 480–482) the synthesis of Si(NMe2)4 using LiNMe2 and SiCl4 in toluene in 60% yield. When, the same experiment was repeated by the inventors of the instant invention, the product contained chlorine content too high (a few percent) for semiconductor grade materials.
Therefore, it is one object of this invention to provide CVD precursors and CVD processes to deposit high dielectric constant thin films, having minimum carbon and halide incorporation and when deposited on a silicon substrate, minimal SiO2 interlayer.
It is a further object of this invention to synthesize aminosilane source reagents in high yield and high purity.
It is a still further object of the present invention to provide CVD precursors and a CVD process to deposit silicon containing thin films, having minimum carbon and halide incorporation and when deposited on a silicon substrate, minimal SiO2 interlayer.
It is another object of the invention to provide methods of forming silicon-containing films in the manufacturing of integrated circuits and other microelectronic device structures.
It is another object of the invention to provide a method of forming silicon-containing thin films on a substrate by metalorganic chemical vapor deposition (CVD) utilizing such novel silicon precursors and solution compositions.
The present invention relates to novel precursor compositions for low temperature (<600° C.) chemical vapor deposition (CVD) formation of silicon-containing films, and to associated methods of making and using such types of compositions.
Other objects and advantages of the present invention will be more fully apparent from the ensuing disclosure and appended claims.